Conferences · eligible papers
DAC
2021–2025 確定版
2023 · 264 papers
このEditionに反映済みのmain full research papersのみ掲載しています。著者リンクは日本の大学への著者別所属根拠がある場合に限ります。
- A Comprehensive Automated Exploration Framework for Systolic Array Designs
日本大学: 関与なし(対象大学)
- A Convolution Neural Network Accelerator Design with Weight Mapping and Pipeline Optimization
日本大学: 関与なし(対象大学)
- A Database Dependent Framework for K-Input Maximum Fanout-Free Window Rewriting
日本大学: 関与なし(対象大学)
- A Fast Secure Deletion Strategy for High-Density Flash Memory through WOM-v Codes
日本大学: 関与なし(対象大学)
- A High-accurate Multi-objective Exploration Framework for Design Space of CPU
日本大学: 関与なし(対象大学)
- A Matching Based Escape Routing Algorithm with Variable Design Rules and Constraints
日本大学: 関与なし(対象大学)
- A Memory-Efficient Edge Inference Accelerator with XOR-based Model Compression
日本大学: 関与なし(対象大学)
- A Model-Specific End-to-End Design Methodology for Resource-Constrained TinyML Hardware
日本大学: 関与なし(対象大学)
- A Universal Method for Task Allocation on FP-FPS Multiprocessor Systems with Spin Locks
日本大学: 関与なし(対象大学)
- A digital 3D TCAM accelerator for the inference phase of Random Forest
日本大学: 関与なし(対象大学)
- ACGraph: Accelerating Streaming Graph Processing via Dependence Hierarchy
日本大学: 関与なし(対象大学)
- ADAPTIVE: Agent-Based Learning for Bounding Time in Mixed-Criticality Systems
日本大学: 関与なし(対象大学)
- AGD: A Learning-based Optimization Framework for EDA and its Application to Gate Sizing
日本大学: 関与なし(対象大学)
- ALMOST: Adversarial Learning to Mitigate Oracle-less ML Attacks via Synthesis Tuning
日本大学: 関与なし(対象大学)
- ANAS: Asynchronous Neuromorphic Hardware Architecture Search Based on a System-Level Simulator
日本大学: 関与なし(対象大学)
- APP: Enabling Soft Real-Time Execution on Densely-Populated Hybrid Memory System
日本大学: 関与なし(対象大学)
- APPEND: Rethinking ASIP Synthesis in the Era of AI
日本大学: 関与なし(対象大学)
- ASMCap: An Approximate String Matching Accelerator for Genome Sequence Analysis Based on Capacitive Content Addressable Memory
日本大学: 関与なし(対象大学)
- AVX Timing Side-Channel Attacks against Address Space Layout Randomization
日本大学: 関与なし(対象大学)
- AccALS: Accelerating Approximate Logic Synthesis by Selection of Multiple Local Approximate Changes
日本大学: 関与なし(対象大学)
- AccShield: a New Trusted Execution Environment with Machine-Learning Accelerators
日本大学: 関与なし(対象大学)
- Accelerating DNN Inference with Heterogeneous Multi-DPU Engines
日本大学: 関与なし(対象大学)
- Accelerating Sparse Attention with a Reconfigurable Non-volatile Processing-In-Memory Architecture
日本大学: 関与なし(対象大学)
- Accelerating Sparse LU Factorization with Density-Aware Adaptive Matrix Multiplication for Circuit Simulation
日本大学: 関与なし(対象大学)
- ActiWate: Adaptive and Design-agnostic Active Watermarking for IP Ownership in Modern SoCs
日本大学: 関与なし(対象大学)
- AdaGL: Adaptive Learning for Agile Distributed Training of Gigantic GNNs
日本大学: 関与なし(対象大学)
- AdaS: A Fast and Energy-Efficient CNN Accelerator Exploiting Bit-Sparsity
日本大学: 関与なし(対象大学)
- Advances and Trends on On-Chip Compute-in-Memory Macros and Accelerators
日本大学: 関与なし(対象大学)
- Algorithms and Hardware for Efficient Processing of Logic-based Neural Networks
日本大学: 関与なし(対象大学)
- AmgR: Algebraic Multigrid Accelerated on ReRAM
日本大学: 関与なし(対象大学)
- An Efficient Accelerator for Point-based and Voxel-based Point Cloud Neural Networks
日本大学: 関与なし(対象大学)
- An Extension to Basis-Hypervectors for Learning from Circular Data in Hyperdimensional Computing
日本大学: 関与なし(対象大学)
- An FPGA-Compatible TRNG with Ultra-High Throughput and Energy Efficiency
日本大学: 関与なし(対象大学)
- An Iterative Method for Mapping-Aware Frequency Regulation in Dataflow Circuits
日本大学: 関与なし(対象大学)
- Any-Angle Routing for Redistribution Layers in 2.5D IC Packages
日本大学: 関与なし(対象大学)
- Architecting Selective Refresh based Multi-Retention Cache for Heterogeneous System (ARMOUR)
日本大学: 関与なし(対象大学)
- AutoDCIM: An Automated Digital CIM Compiler
日本大学: 関与なし(対象大学)
- Automated Design of Complex Analog Circuits with Multiagent based Reinforcement Learning
日本大学: 関与なし(対象大学)
- Automatic End-to-End Joint Optimization for Kernel Compilation on DSPs
日本大学: 関与なし(対象大学)
- Automating Constraint-Aware Datapath Optimization using E-Graphs
日本大学: 関与なし(対象大学)
- BERRY: Bit Error Robustness for Energy-Efficient Reinforcement Learning-Based Autonomous Systems
日本大学: 関与なし(対象大学)
- BLITZCRANK: Factor Graph Accelerator for Motion Planning
日本大学: 関与なし(対象大学)
- BP-NTT: Fast and Compact in-SRAM Number Theoretic Transform with Bit-Parallel Modular Multiplication
日本大学: 関与なし(対象大学)
- BWA-NIMC: Budget-based Workload Allocation for Hybrid Near/In-Memory-Computing
日本大学: 関与なし(対象大学)
- Battle Against Fluctuating Quantum Noise: Compression-Aided Framework to Enable Robust Quantum Neural Network
日本大学: 関与なし(対象大学)
- Bit-Serial Cache: Exploiting Input Bit Vector Repetition to Accelerate Bit-Serial Inference
日本大学: 関与なし(対象大学)
- BlueFace: Integrating an Accelerator into the Core’s Pipeline through Algorithm-Interface Co-Design for Real-Time SoCs
日本大学: 関与なし(対象大学)
- Bumblebee: A MemCache Design for Die-stacked and Off-chip Heterogeneous Memory Systems
日本大学: 関与なし(対象大学)
- C<sup>2</sup>PI: An Efficient Crypto-Clear Two-Party Neural Network Private Inference
日本大学: 関与なし(対象大学)
- CHAM: A Customized Homomorphic Encryption Accelerator for Fast Matrix-Vector Product
日本大学: 関与なし(対象大学)
- COSA:Co-Operative Systolic Arrays for Multi-head Attention Mechanism in Neural Network using Hybrid Data Reuse and Fusion Methodologies
日本大学: 関与なし(対象大学)
- CPE: An Energy-Efficient Edge-Device Training with Multi-dimensional Compression Mechanism
日本大学: 関与なし(対象大学)
- CSQ: Growing Mixed-Precision Quantization Scheme with Bi-level Continuous Sparsification
日本大学: 関与なし(対象大学)
- ChaosINTC: A Secure Interrupt Management Mechanism against Interrupt-based Attacks on TEE
日本大学: 関与なし(対象大学)
- Chiplets: How Small is too Small?
日本大学: 関与なし(対象大学)
- Compact and High-Performance TCAM Based on Scaled Double-Gate FeFETs
日本大学: 関与なし(対象大学)
- Compiler Optimization for Quantum Computing Using Reinforcement Learning
日本大学: 関与なし(対象大学)
- Comprehensive Integration of Hyperdimensional Computing with Deep Learning towards Neuro-Symbolic AI
日本大学: 関与なし(対象大学)
- Concurrent Sign-off Timing Optimization via Deep Steiner Points Refinement
日本大学: 関与なし(対象大学)
- Condense: A Framework for Device and Frequency Adaptive Neural Network Models on the Edge
日本大学: 関与なし(対象大学)
- Contention-Free Configured Grant Scheduling for 5G URLLC Traffic
日本大学: 関与なし(対象大学)
- CorcPUM: Efficient Processing Using Cross-Point Memory via Cooperative Row-Column Access Pipelining and Adaptive Timing Optimization in Subarrays
日本大学: 関与なし(対象大学)
- Correlation-guided Placement for Nonvolatile FPGAs
日本大学: 関与なし(対象大学)
- Critical Paths Prediction under Multiple Corners Based on BiLSTM Network
日本大学: 関与なし(対象大学)
- Cryogenic In-Memory Matrix-Vector Multiplication using Ferroelectric Superconducting Quantum Interference Device (FE-SQUID)
日本大学: 関与なし(対象大学)
- DARIC: A Data Reuse-Friendly CGRA for Parallel Data Access via Elastic FIFOs
日本大学: 関与なし(対象大学)
- DBPS: Dynamic Block Size and Precision Scaling for Efficient DNN Training Supported by RISC-V ISA Extensions
日本大学: 関与なし(対象大学)
- DRPTM: A Decoupled Read-efficient High-scalable Persistent Transactional Memory
日本大学: 関与なし(対象大学)
- DSPIMM: A Fully Digital SParse In-Memory Matrix Vector Multiplier for Communication Applications
日本大学: 関与なし(対象大学)
- DeepOHeat: Operator Learning-based Ultra-fast Thermal Simulation in 3D-IC Design
日本大学: 関与なし(対象大学)
- Design Automation for Cryogenic CMOS Circuits
日本大学: 関与なし(対象大学)
- DiffPattern: Layout Pattern Generation via Discrete Diffusion
日本大学: 関与なし(対象大学)
- Discerning Limitations of GNN-based Attacks on Logic Locking
日本大学: 関与なし(対象大学)
- Disjoint-Path and Golden-Pin Based Irregular PCB Routing with Complex Constraints
日本大学: 関与なし(対象大学)
- DistHD: A Learner-Aware Dynamic Encoding Method for Hyperdimensional Classification
日本大学: 関与なし(対象大学)
- DmTSAR-ILP: Allocating a Unified Domain Platform for Streaming Applications
日本大学: 関与なし(対象大学)
- Don’t-Care Aware ESOP Extraction via Reduced Decomposition-Tree Exploration
日本大学: 関与なし(対象大学)
- DriverJar: Lightweight Device Driver Isolation for ARM
日本大学: 関与なし(対象大学)
- Dynamic Sparse Training via Balancing the Exploration-Exploitation Trade-off
日本大学: 関与なし(対象大学)
- EDGE: Efficient DAG-based Global Routing Engine
日本大学: 関与なし(対象大学)
- EENet: Energy Efficient Neural Networks with Run-time Power Management
日本大学: 関与なし(対象大学)
- EP-ORAM: Efficient NVM-Friendly Path Eviction for Ring ORAM in Hybrid Memory
日本大学: 関与なし(対象大学)
- EagleRec: Edge-Scale Recommendation System Acceleration with Inter-Stage Parallelism Optimization on GPUs
日本大学: 関与なし(対象大学)
- Efficient ILT via Multi-level Lithography Simulation
日本大学: 関与なし(対象大学)
- Efficient Non-Linear Adder for Stochastic Computing with Approximate Spatial-Temporal Sorting Network
日本大学: 関与なし(対象大学)
- Efficient Transformer Inference with Statically Structured Sparse Attention
日本大学: 関与なし(対象大学)
- Energy-Efficient On-Chip Training for Customized Home-based Rehabilitation Systems
日本大学: 関与なし(対象大学)
- Ever more optimized simulations of fermionic systems on a quantum computer
日本大学: 関与なし(対象大学)
- ExploreFault: Identifying Exploitable Fault Models in Block Ciphers with Reinforcement Learning
日本大学: 関与なし(対象大学)
- FIONA: Fine-grained Incoherent Optical DNN Accelerator Search for Superior Efficiency and Robustness
日本大学: 関与なし(対象大学)
- FLNA: An Energy-Efficient Point Cloud Feature Learning Accelerator with Dataflow Decoupling
日本大学: 関与なし(対象大学)
- FPDsim: A Structural Simulator For Power Grid Analysis Of Flat Panel Display
日本大学: 関与なし(対象大学)
- FSPA: An FeFET-based Sparse Matrix-Dense Vector Multiplication Accelerator
日本大学: 関与なし(対象大学)
- Fair Will Go On: A Collaboration-Aware Fairness Scheme for NVMe SSD in Cloud Storage System
日本大学: 関与なし(対象大学)
- Fast Adversarial Training with Dynamic Batch-level Attack Control
日本大学: 関与なし(対象大学)
- Fast FPGA Accelerator of Graph Cut Algorithm with Out-of-order Parallel Execution in Folding Grid Architecture
日本大学: 関与なし(対象大学)
- Faster and Stronger Lossless Compression with Optimized Autoregressive Framework
日本大学: 関与なし(対象大学)
- Fault Injection in Native Logic-in-Memory Computation on Neuromorphic Hardware
日本大学: 関与なし(対象大学)
- Fault Tolerance in Time-Sensitive Networking with Mixed-Critical Traffic
日本大学: 関与なし(対象大学)
- Fault-Tolerance-Oriented Physical Design for Fully Programmable Valve Array Biochips
日本大学: 関与なし(対象大学)