Conferences · eligible papers
DAC
2022–2026 LIVE
2026 · 560 papers
このEditionに反映済みのmain full research papersのみ掲載しています。著者リンクは日本の大学への著者別所属根拠がある場合に限ります。
- Can Asymmetric Tile Buffering Be Beneficial?
日本大学: 関与なし(対象大学)
- CapBench: A Multi-PDK Dataset for Machine-Learning-Based Post-Layout Capacitance Extraction
日本大学: 関与なし(対象大学)
- Capacitive Touchscreens at Risk: Recovering Handwritten Trajectory on Smartphone via Electromagnetic Emanations
日本大学: 関与なし(対象大学)
- CelestialEye: A Synergistic CPU-FPGA Engine for Accurate Frequency Measurement in High-speed Data Streams
日本大学: 関与なし(対象大学)
- Cell-Structure-Independent Transistor-Level Placement and MOL-Aware Routing Framework Beyond the Standard-Cell Paradigm
日本大学: 関与なし(対象大学)
- CellE: Automated Standard Cell Library Extension via Equality Saturation
日本大学: 関与なし(対象大学)
- Challenges and Solutions in the next-generation Emulation and Prototyping solutions
日本大学: 関与なし(対象大学)
- ChatSVA: Bridging SVA Generation for Hardware Verification via Task-Specific LLMs
日本大学: 関与なし(対象大学)
- ChiPlanner: Physically-Aware and Timing-Driven Design Planner for 2.5D Multi-Chiplet Systems
日本大学: 関与なし(対象大学)
- ChiSER: Surrogate-Enhanced Resource-aware Exploration of Chiplet-based Deep Neural Network Accelerators
日本大学: 関与なし(対象大学)
- Chimera: A Unified FHE Accelerator with Enhanced Compatibility for TFHE
日本大学: 関与なし(対象大学)
- ChipModeler: LLM-Aided Reference Model Design for Agile Hardware Verification
日本大学: 関与なし(対象大学)
- CipherShield: Safeguarding DNN Inputs from Ciphertext Side-Channels in TEE
日本大学: 関与なし(対象大学)
- CircuitDiff: Bridging Netlist Knowledge with RTL based on Graph Denoising Diffusion
日本大学: 関与なし(対象大学)
- Closing the Loop: Hybrid NAS Guided by Analytical and Hardware-Calibrated Quantum Cost Modeling
日本大学: 関与なし(対象大学)
- CoX-MoE: Coalesced Expert Execution for High-Throughput MoE Inference with AMX-Enabled CPU-GPU Co-Execution
日本大学: 関与なし(対象大学)
- ComPart: Community-Guided Post-Coarsening for High-Quality Hypergraph Partitioning
日本大学: 関与なし(対象大学)
- Compilation Pipeline for Predicting Algorithmic Break-Even in an Early-Fault-Tolerant Surface Code Architecture
日本大学: 関与なし(対象大学)
- Compilation Tells Energy: Rethinking Power Modeling for DNN Accelerator Agile Design
日本大学: 関与なし(対象大学)
- Compiler Framework for Directional Transport in Zoned Neutral-Atom Systems with AOD Assistance: A Hybrid Remote CZ Approach
日本大学: 関与なし(対象大学)
- Coordinated Clip-Wise Gradient Scheduling for Full-Chip ILT via Policy Learning
日本大学: 関与なし(対象大学)
- CrediX: A Credit-driven Distributed Buffer Management for Large-scale Switching Chips
日本大学: 関与なし(対象大学)
- Crosstalk Timing Prediction via Graph Prompt Learning in Aggressor-Victim RC Networks
日本大学: 関与なし(対象大学)
- CryoZip: An Efficient Cryogenic Compressor for Quantum Error Correction Syndromes
日本大学: 関与なし(対象大学)
- Crystal-KV: Efficient KV Cache Management for Chain-of-Thought LLMs via Answer-First Principle
日本大学: 関与なし(対象大学)
- CtxMem: OS-Hardware Co-designed Tiered Memory with DRAM-SSD Hybrid CXL Devices
日本大学: 関与なし(対象大学)
- DAP: A Software/Hardware Co-design for Accelerating Multi-chip-based distributed Sparse-Dense Matrix Multiplication
日本大学: 関与なし(対象大学)
- DCTS: Differentiable Clock Tree Synthesis Based on Probabilistic Graphical Model
日本大学: 関与なし(対象大学)
- DFA-DRIVE: A Cross-layer Delay Fault Analysis and Optimization Framework for Robust Multi-Task Driving Perception
日本大学: 関与なし(対象大学)
- DIA-CIM: A Dynamic Iterative Aggregation Graph Neural Network and Its Hardware Co-Design for Energy- Efficient Graph Processing
日本大学: 関与なし(対象大学)
- DM-MARK: Software and hardware Co-design of Watermarking Accelerator for Authorized Diffusion Model Usage on Edge Devices
日本大学: 関与なし(対象大学)
- DR. OPC: Differentiable Rasterization for Advanced Optical Proximity Correction
日本大学: 関与なし(対象大学)
- DRCA: Reliable Bitwise Logic in DRAM via Dual-Rail Compute and Access
日本大学: 関与なし(対象大学)
- DRCGen: A Controllable DRC Violation Case Generator with Cross-PDK Transferability for Rule-Deck and Tool Validation
日本大学: 関与なし(対象大学)
- DRIFT: Harnessing Inherent Fault Tolerance for Efficient and Reliable Diffusion Model Inference
日本大学: 関与なし(対象大学)
- DRΛMA: Detailed Routing by a Versatile Maze Routing Algorithm
日本大学: 関与なし(対象大学)
- DSPE: An Energy-Efficient Edge Processor for DeepSeek Inference with MerkleTree-based Incremental Pruning, Multi-Stage Boothing Lookup and Dynamic Adaptive Posit Processing
日本大学: 関与なし(対象大学)
- DUET: Disaggregated Hybrid Mamba-Transformer LLMs with Prefill and Decode-Specific Packages
日本大学: 関与なし(対象大学)
- Dart: Towards Redundancy-Free RTL Simulation via DAG-Driven Execution
日本大学: 関与なし(対象大学)
- DataFlowGen: An MLIR-based Compiler for Efficient Dataflow Accelerator Generation
日本大学: 関与なし(対象大学)
- DeInfer: Efficient Parallel Inferencing for Decomposed Large Language Models
日本大学: 関与なし(対象大学)
- DeTrojan: Detecting Trojan Circuits Using a Purpose-Built Graph Neural Network with Community- Enhanced Classification
日本大学: 関与なし(対象大学)
- Debug Like a Human: Scaling LLM-based Fault Localization to Processor Design via Block-Level Instruction-Oriented Slicing
日本大学: 関与なし(対象大学)
- Decoding the Past: Recovering Sensitive Data from SRAM Aging Imprints
日本大学: 関与なし(対象大学)
- Delay-Constrained Area Optimisation Using SAT-Based Local Improvement
日本大学: 関与なし(対象大学)
- DeltaSight: Architecting Efficient Video AIoT Systems via Cross-Stage Consistent Redundancy Elimination
日本大学: 関与なし(対象大学)
- Design Technology Co-optimization for Network on Chip in High Performance CPUs at 3nm node using Monolithic 3D and Backside Interconnect Technologies
日本大学: 関与なし(対象大学)
- DiffDEG: Diffusion-Enhanced Design Evolution Graph Representation Learning for Post-Layout Optimization
日本大学: 関与なし(対象大学)
- DiffSP: Differentiable Sequence Pair-based Analog Placement
日本大学: 関与なし(対象大学)
- Differentiable Fill Insertion with Explicit Delay Optimization
日本大学: 関与なし(対象大学)
- Digital Inside Analog: Continuous-Time Pipelined ADCs for Wideband Analog-to-Digital Conversion
日本大学: 関与なし(対象大学)
- Digitally Assisted Analog Techniques for Next-Generation Data Converters, Test, and Clocking
日本大学: 関与なし(対象大学)
- Disentangled Differentiable Timing-Power Co-Optimization with Quad-Gradient Gate sizing
日本大学: 関与なし(対象大学)
- Drop-In Masked Modular Reduction for ML-DSA: Cutting Side-Channel Cost in the Root-of-Trust
日本大学: 関与なし(対象大学)
- Dropping Multiple Literals per SAT call in IC3 Model Checking
日本大学: 関与なし(対象大学)
- Duet: Exploiting High-Order Lossless Sparsity for Bit-Serial Transformer Acceleration via Distribution- Aware Pruning
日本大学: 関与なし(対象大学)
- Duplication-Aware Retiming and Cell Interface Redesign for Superconductor Circuit Minimization
日本大学: 関与なし(対象大学)
- DyPamear: Efficient and Scalable Dynamic Graph Pattern Mining on Practical Processing-in-Memory Architecture
日本大学: 関与なし(対象大学)
- DySL-VLA: Efficient Vision-Language-Action Model Inference via Dynamic-Static Layer-Skipping for Robot Manipulation
日本大学: 関与なし(対象大学)
- Dynamic-Cost Area Recovery for Fracturable LUT-Based FPGAs
日本大学: 関与なし(対象大学)
- E3-CODE: Embedded and Efficient Error-Correcting Code for Error-Resilient Neural Networks
日本大学: 関与なし(対象大学)
- EARL: Entropy-Aware RL Alignment of LLMs for Reliable RTL Code Generation
日本大学: 関与なし(対象大学)
- EASY-ZKP: An End-to-end FPGA-accelerated System for Zero Knowledge Proofs
日本大学: 関与なし(対象大学)
- ECPrefix: Erasure-Coded Prefix KV Cache for Optimizing Load Balancing in Large Language Model Serving
日本大学: 関与なし(対象大学)
- EHPC: Efficient Heterogeneous Probabilistic Computing Architecture for Combinatorial Optimization Acceleration
日本大学: 関与なし(対象大学)
- ELMBA: Escape from Local Minima in Buffer and Splitter Insertion for AQFP Circuits
日本大学: 関与なし(対象大学)
- ENACT: Ensemble Neural Fields for Reactive Robot Control
日本大学: 関与なし(対象大学)
- EPAR: Electromagnetic Pathways to Architectural Reliability in Quantum Processors
日本大学: 関与なし(対象大学)
- EPiCell: Electro-Physical Co-Modeling for Standard Cell PPA Prediction
日本大学: 関与なし(対象大学)
- ESCAPE: Elegant Scan Chain Activity Probability Establishment for Programmable Low-Power LBIST
日本大学: 関与なし(対象大学)
- EXPCheck: Dynamic Expert-Aware Checkpointing for Mixture-of-Experts based Models
日本大学: 関与なし(対象大学)
- EXRA: Efficient Execution of Data-Dominated Applications via ISA Extensions for Expandable Register Files
日本大学: 関与なし(対象大学)
- Early Design Stage Thermal Prediction and Optimization: Machine-Learning Driven Approach
日本大学: 関与なし(対象大学)
- EastPCG: An Efficient and Self-Tuning Graph Sparsification Based PCG Solver for Circuit Simulation
日本大学: 関与なし(対象大学)
- EdgeSC: Universal Stochastic Computing Architecture for Efficient Edge Detection
日本大学: 関与なし(対象大学)
- Efficient HLS Accelerator Floorplan on Multi-Die FPGA Aided by Graph Neural Networks
日本大学: 関与なし(対象大学)
- Efficient IR-Aware Powergrid Optimization
日本大学: 関与なし(対象大学)
- EmuDRop: A Minimalistic, Hardware-based Emulation Detection Approach through Intel Reserved Opcodes
日本大学: 関与なし(対象大学)
- Enabling AI ASICs for Zero Knowledge Proof
日本大学: 関与なし(対象大学)
- Enabling Early Thermal Insight in Heterogeneous Integration Through Implementation-Driven Power Modeling
日本大学: 関与なし(対象大学)
- Enabling Robust On-Device Personalization via Pulse-Based Mapping and Noise Suppression for Non- Ideal CIM Architecture
日本大学: 関与なし(対象大学)
- EnergyHDC: Intermittent Hyperdimensional Inference on Energy-Harvesting IoT
日本大学: 関与なし(対象大学)
- Escaping Flatland: A Placement Flow for Enabling 3D FPGAs
日本大学: 関与なし(対象大学)
- EtherSSD: An In-Storage Ethereum Analytics Platform with Minimized I/O and Authentication Overhead
日本大学: 関与なし(対象大学)
- ExQuant: Global Expert Ranking–Guided Mixed-Precision Quantization for Efficient MoE Inference
日本大学: 関与なし(対象大学)
- Excavating Consistency Across Editing Steps for Effective Multi-Step Image Editing
日本大学: 関与なし(対象大学)
- ExpertFlow: Efficient Mixture-of-Experts Inference via Predictive Expert Caching and Token Scheduling
日本大学: 関与なし(対象大学)
- Exploiting Dependency and Parallelism: Real-Time Scheduling and Analysis for GPU Tasks
日本大学: 関与なし(対象大学)
- Exploiting Function-Family Structure in Analog Circuit Optimization
日本大学: 関与なし(対象大学)
- Exploiting Movable Logical Qubits for Lattice Surgery Compilation
日本大学: 関与なし(対象大学)
- Exploiting Per-Core Leakage: Electromagnetic Side-Channel Monitoring of Multicore Architectures
日本大学: 関与なし(対象大学)
- FBS: Accelerating CNN Inference over RNS-CKKS with Fewer Bootstrapping Sparsity
日本大学: 関与なし(対象大学)
- FILCO: Flexible Composing Architecture with Real-Time Reconfigurability for DNN Acceleration
日本大学: 関与なし(対象大学)
- FLASH3D: A Fast Layered Analytical Solver for High-Accuracy Steady-State Thermal Simulation of 3D ICs
日本大学: 関与なし(対象大学)
- FSGen: Agile Fused and Sparse Accelerator Generator with Accurate Power Model for LLM Applications
日本大学: 関与なし(対象大学)
- FUSE-TCAD: A Diffusion-Based Multi-Field Surrogate for High-Fidelity TCAD Device Simulation
日本大学: 関与なし(対象大学)
- Factored Floating-Point MAC: Eliminating Redundant Normalization for Energy-Efficient Systolic Arrays
日本大学: 関与なし(対象大学)
- Fast Template Matching for Quantum Circuits Using Hypergraph
日本大学: 関与なし(対象大学)
- Faster-MoA: Low-Latency Tree-Structured MoA Serving with Early Exit and Agent-Aware Prefill-Decode Overlap
日本大学: 関与なし(対象大学)
- Finding Behavior Bugs in IoT Messaging Protocols with Automated Oracle Generation and Monitoring
日本大学: 関与なし(対象大学)